The present invention relates generally to power supplies, and more particularly to a voltage stabilizer for an inverter control circuit.
The switching regulator includes a solid-state inverter for converting a d.c. voltage to a high-frequency voltage and a rectifier/filter circuit that converts the high-frequency voltage to a desired d.c. voltage for delivery to a load circuit. The inverter comprises a semiconductor switching device that chops the input d.c. voltage in response to a firing pulse applied thereto to cause a high frequency current to be generated in an LC resonant circuit. The firing pulse is generated by an inverter controller which is implemented by an integrated circuit. To maintain the d.c. output voltage at a desired level, the inverter controller compares it with a reference voltage to detect the difference between them and controls the duration, or duty cycle of the firing pulse in accordance with the detected difference through a feedback loop. Because of the feedback operation, the initial low output voltage, which is generated immediately following the turn-on of power switch, causes an excess input d.c. current. To avoid the excess input current, a voltage controller as shown in FIG. 1A is provided. The d.c. input voltage V.sub.i is applied across a Zener diode 4 and a resistor 5. Transistor 1 remains nonconductive, and hence the output voltage is zero when the voltage across the Zener diode 4 is lower than a breakdown voltage V.sub.z. When the input voltage V.sub.i becomes equal to a threshold value V.sub.z +V.sub.BE (where V.sub.BE is the base-emitter voltage of the transistor 1), current begins flowing through diode 4 and resistor 3 from the base of transistor 1, causing it to conduct to produce an output voltage V.sub.o, as shown in FIG. 1B, for delivery to the IC feedback circuit as well as to the inverter. A resistor 2 is connected across the base and emitter of transistor 1 to allow leakage current of transistor 1 to pass through it. Being represented by the relation V.sub.i -V.sub.CE (where V.sub.CE is the collector voltage of transistor 1), the output voltage V.sub.o increases linearly with input voltage V.sub.i after the latter exceeds beyond the threshold value V.sub.Z +V.sub.BE. Therefore, provision must be made to prevent the d.c. output voltage from exceeding the rated power supply voltage of the IC chip. A voltage controller shown in FIG. 2A has been developed to overcome the disadvantage of the controller of FIG. 1A. With this controller, the base of a transistor 6 is connected to a junction between a Zener diode 8 and a resistor 7 across which the d.c. input voltage V.sub.i is applied. Resistor 7 serves as a bypass path for the leakage current of the transistor 6. When the input voltage V.sub.i is lower than the breakdown voltage V.sub.z of the Zener diode 8, d.c. output voltage V.sub.o developed at the emitter of transistor 6 increases linearly as shown in FIG. 2B. After the d.c. input voltage reaches V.sub.z, the d.c. output voltage V.sub.o is maintained constant at a voltage V.sub.z -V.sub.BE, where V.sub.BE is the base-emitter voltage of the transistor 6. Although the output voltage can be maintained constant after a threshold is reached, the generation of the initial output voltage for low input voltages is disadvantage for application to switching regulators.